SATA Pathway Verification Based on High-performance Secure Memory Chip
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    Abstract:

    This study uses the UVM verification methodology to verify the serial advanced technology attachment (SATA) pathway in the self-developed high-performance secure memory system on chip (SoC) chip system. In this study, the architecture of a high-performance secure memory SoC chip and the working principle of the SATA pathway system are explained. Taking the SATA direct memory access (DMA) data transmission mode as an example, this study introduces the establishment of SATA protocol link communication and the process of data transmission. In addition, this study builds the UVM system verification platform, analyzes the SATA protocol, designs and plans the test cases at the system level, and writes the C firmware test program loaded into the system to run. In this way, programmed input/output (PIO), DMA, native command queuing (NCQ), and other data transmission pathways under SATA commands concerned at the system application level are verified. Together with the specific waveform analysis, the results show that the SATA pathway-related integration design is reasonable and meets the application requirements of the chip for the SATA data pathway, which verifies the SATA pathway for the high-performance secure memory SoC chip system.

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常琳琳,于哲,周舜民,韩林.基于高性能安全存储芯片的SATA通路验证.计算机系统应用,2023,32(5):338-343

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History
  • Received:September 23,2022
  • Revised:October 21,2022
  • Adopted:
  • Online: March 17,2023
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