Vivado High Level Synthesis Hardware Acceleration Based on Genetic Algorithm
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    Abstract:

    At present, in order to adapt to the coming of “big data and in-depth model” age, a feasible solution is put forward by using FPGA to realize hardware accelerator of various algorithms. In this study, by using Vivado HLS tools, a set of intelligent hardware acceleration architecture is designed based on the genetic algorithm, which can automatically generate TCL file by programming, and automatically call HLS tool to complete the simulation analysis and extract the data to analyze in the report. What's more, the case programs like FIR and DCT given by the Xilinx company are tested. A better solution is found in the experiments, and the efficiency is increased by magnitude compared with the manual methods. It has met the universality of the general algorithm in hardware acceleration.

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陈宝林,黄晞,张仕,郭升挺,吴家飞,苏浩明.基于遗传算法的Vivado HLS硬件加速.计算机系统应用,2018,27(1):120-126

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History
  • Received:March 24,2017
  • Revised:April 13,2017
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  • Online: December 22,2017
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