The algorithm based on FPGA to achieve high definition and large capacity video processing has certain complexity. In order to use the Verilog HDL to describe the image processing algorithms better, a set of video image processing model in Simulink is used. MathWorks company's latest Vision HDL Toolbox is used in the conversion from frame to pixel stream, and then image edge is detected. Finally, the feasibility of the method of this algorithm automatically generating Verilog HDL is verified by using Simulink and ModelSim co-simulation. That could quickly generate more accurate HDL code, improving the speed of description of the image processing algorithm using HDL.