Implementation of Regular Expression Compiler Based on Verilog
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    Abstract:

    With the rapid development of network bandwidth, regular expression matching is becoming the performance bottleneck of networking data processing system. For the purpose of achieving higher matching speed, regular expression matching engine based on FPGA has become one of the recent hot fields. And it is the critical technology how to efficiently transfer regular expression to hardware description language. In this paper, we first analyze the algorithm of converting regular expression to hardware circuit, and then implement a compiler based on this algorithm. Finally we simulate the circuit on the Modelsim platform. The results proved the accuracy of the compiler.

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邓凯元.基于Verilog 的正则表达式编译器的实现.计算机系统应用,2012,21(2):229-232

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  • Received:June 11,2011
  • Revised:July 11,2011
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